Image sensors include an array of photosensitive pixels which accumulate electric charge in response to incident light. Modern image sensors include a large number of photosensitive pixels, such as millions of photosensitive pixels, to achieve high imaging resolution. These image sensors also typically include extensive electrical circuitry to control the photosensitive pixels and to read-out accumulated electrical charge from the photosensitive pixels. For example, some image sensors include a respective read-out circuit for each column of photosensitive pixels, where the read-out circuit (1) reads-out electrical charge as electrical signals from its respective column of photosensitive pixels and (2) digitizes the electrical signals to generate pixel image data. Each read-out circuit includes, for example, an operational amplifier (op-amp) configured as a comparator for digitizing the electrical signals.
Magnitude of current drawn by the electrical circuitry may vary significantly over time. For example, magnitude of current drawn by op-amps in read-out circuitry may vary significantly over a row-period of the image sensor, where the row-period is a period of time where pixel image data is read-out from a given row of pixels in the array of pixels. Although variation in magnitude of current drawn by any one particular electrical component may be small, collective variation in current drawn by all electrical components of the electrical circuitry may be relatively large. This variation in magnitude of current drawn may cause distortion on imaging system power rails.
For example, FIG. 1 illustrates a prior art image sensor 100 including an array 102 of photosensitive pixels 104 and associated electrical circuitry 106. To promote illustrative clarity, not all photosensitive pixels 104 are labeled in FIG. 1. Electrical circuitry 106, which controls photosensitive pixels 104 and reads pixel image data therefrom, is powered from a positive power rail 108 and a negative power rail 110. Positive power rail 108 has a parasitic impedance 112, and negative power rail 110 has a parasitic impedance 114. Each of parasitic impedance 112 and 114 has a resistive component and an inductive component. Although parasitic impedances 112 and 114 are shown as lumped elements for illustrative convenience, parasitic impedances 112 and 114 are actually distributed along their respective power rails.
Positive power rail 108 and negative power rail 110 are powered by an electric power source 116 having a voltage Vin. Voltage across positive power rail 108 and negative power rail 110 at electrical circuitry 106 is designed as voltage Ve. Voltage Ve at electrical circuitry 106 may not be the same as voltage Vin at electric power source 116 due to presence of parasitic impedances 112 and 114. Electrical circuitry 106 draws current Ie from electric power source 116.
Current Ie may change due to changes in operating conditions of electrical circuitry 106. Change in current Ie will cause voltage to develop across parasitic impedances 112 and 114, thereby distorting voltage Ve. For example, voltage V112 across parasitic impedance 112 due to a change in current Ie is defined as follows, where ΔIe is change in current Ie, ΔT is rate of change in current Ie, R112 is the resistive component of parasitic impedance 112, and L112 is the inductive component of parasitic impedance 112:V112=(ΔIe)(R112)+(ΔIe)(L112)/(ΔT)  EQN. 1
Similarly, voltage V114 across parasitic impedance 114 due to a change in current Ie is defined as follows, where R114 is the resistive component of parasitic impedance 114, and L114 is the inductive component of parasitic impedance 114:V114=(ΔIe)(R114)+(ΔIe)(L114)/(ΔT)  EQN. 2
Distortion ΔVe of voltage Ve due to change in current Ie, is defined as follows:ΔVe=(ΔIe)(R112+R114)+(ΔIe)(L112+L114)/(ΔT)  EQN. 3
Thus, distortion of voltage Ve includes a component that is directly proportional to magnitude of change in current Ie, and distortion of voltage Ve includes a component that is indirectly proportional to rate of change of current Ie.
Electrical circuitry 106 often includes electrical components, such as analog electrical components like op-amps, which are sensitive to changes in voltage Ve. Consequentially, distortion of voltage Ve may cause improper operation of image sensor 100. For example, distortion of voltage Ve may cause horizontal-banding (H-banding) artifacts in pixel image data generated by image sensor 100. Accordingly, it is desirable to minimize distortion of voltage Ve.
One conventional technique for minimizing distortion of voltage Ve is to include clamping circuits in electrical circuitry 106 to limit changes in current Ie. This technique, however, requires adding components to image sensor 100, thereby increasing cost, complexity, and size of the image sensor. Another conventional technique for minimizing distortion of voltage Ve is to minimize parasitic impedances 112 and 114. This technique, however, requires increasing cross-sectional area of positive power rail 108 and negative power rail 110, and/or increasing conductivity of the power rails, which may be undesirable or infeasible due to cost, space, and/or manufacturing process constraints.